Tuesday, June 28, 2011

The astable oscillators or multivibrator circuit (example using NE555)


DEFINITION AND FUNCTION
 
An oscillator is an electronic circuit that generates a periodic signal. These signals are of two types.
First, there are sinusoidal signals used in radio communication techniques. Is the carrier of the radio signal and TV signal. This type of wave is generated also in the musical notes of synthesizers in radar technology ...
Then the second type of signal that interests us most here is the rectangular signal, unique to digital technology.
Indeed, this signal is characterized only by transitions from one level to a level L H and vice versa at a frequency determined by the generator circuit. This circuit is usually called astable multivibrator. This circuit has two logic states L and H unstable. The output switches periodically from one state to another logic state complementary. This is shown in Figure 43.
T is the period of the rectangular signal determined by the characteristics of the assembly.
The main function of this signal in the logic circuits is to provide a clock generally called clock. This clock is necessary in synchronous logic circuits where the logic state changes at different point in the circuit are either rising or the falling edge of the clock.
Currently, the clock circuits are found in computers, in devices for measuring time, frequency for data transmission ....
3. 2. - DIFFERENT MOUNTING Astable
We will review a number of montages multivibrators.
3. 2. 1. - ASSEMBLY USING THE SCHMITT TRIGGER
Figure 44 presents an oscillator using a CMOS trigger of the family.
A power-assembly, the voltage Vc is zero and the output is in H.
As shown in Figure 45, the capacitor C is charged through resistor R and at time t1, Vc + VT reached the threshold of the trigger. The output switches and switches to L level: the capacitor begins its discharge through R and at time t2, Vc reaches the trigger-only VT.

The output returns and the level H and the phenomenon is repeated indefinitely. The oscillation period T is defined by the relation:
Note:
ln is the symbol of the natural logarithm function. Calculator allows the calculation.

100 K for R = W, C = 0.1 uF, Vcc = 5 volts, + VT = 3.05 V, VT-volt = 1.95, we find:
T @ 8.9 ms and oscillation f @ 112 Hz
This arrangement is simple but has a drawback. Indeed, the threshold VT + and VT-depend on the supply voltage Vcc, this arrangement does not absolutely stable in frequency, but may have fluctuations related to changes in the voltage Vcc. For a variation of Vcc of 5 volts to 15 volts, frequency can vary from 4 to 5%.
However, this arrangement may be used for applications not requiring high stability and high accuracy.
Moreover, the use of a regulated power supply improves the stability of the oscillator assembly.
3. 2. 2. - ASSEMBLY USING THREE INVERTERS
This arrangement is shown in Figure 46.

It uses the fact that there is a delay D T for each inverter. The timing diagram shown in Figure 47 can understand how it works.
When the signal in VI (or V3) changes from L level to H level, it is clear that the corresponding output switch after a period of time equal to T. D
This is true for the three inverters. The letter "a" in Figure 47, shows the evolution of point to point VI V3. VI re-entry switch so after 3 D T. The signal period is 6 D T and frequency . D T is in seconds.
This circuit provides a high frequency oscillator as the time delay T D are relatively short. If we want to reduce the frequency of oscillation, just add more inverters. Their number must remain odd.
If n is the number of inverters, the oscillation frequency is 1 / 2 n D T.
With this arrangement, the stability is always a function of supply voltage, temperature and load located at its output, so the logic circuit that must be controlled.
It is possible to improve this arrangement by including three passive components as shown in Figure 48.
The timing on the operation is located in Figure 49.
At time t0, the output S is at level L and the input of the inverter is an H level. The potential of the point V1 is going to decline and as soon as this potential reaches the switching threshold of inverter 1, or to Vcc / 2, the three inverters will switch to a string. The output of the inverter 2 goes H level L level at time t1 is a voltage drop of Vcc-V1 and the point is at the potential (Vcc / 2)-Vcc =-Vcc / 2.
However, the output increased at H, so this potential V1 will grow up to + Vcc / 2 (time t2) where the three inverters are switched simultaneously. The point V1 is found (Vcc / 2) + Vcc = 3 / 2 Vcc.
Finally, there is a series of charges and discharges the capacitor C and each time point V1 crosses the switching threshold of inverter 1, the output state changes.
As an example, the oscillation frequency is given by:
This oscillator is insensitive to variations in supply voltage Vcc and its frequency stability is even better than its frequency is low. Indeed, the frequency depends mainly on three components R1, R2 and C.
3. 2. 3. - ASSEMBLY USING TWO INVERTERS Astable
This arrangement is shown in Figure 50. The oscillation frequency is given by the formula. The value of resistor R2 should be at least ten times that
of   R1.
   
Moreover, the values ​​of C and R1 should not be too low because the inverter 2 can provide a very high output current.
It is always possible to put a variable resistor R1. This adjusts the output frequency of the oscillator.
It is also possible to vary the duty cycle to the rectangular signal.
Figure 51 represents the duty cycle to.
The following assembly shown in Figure 52 is per to vary the duty cycle to.
The timing located in Figure 53 can explain the operation of the oscillator.
At time t1, the output S is in L and A to H level.
Point B is then the potential-Vcc / 2, as discussed at the end of this reasoning, Vcc is the power supply assembly.
The capacitor C then discharges through diode D2 and a portion of the potentiometer P1, since the point A is at + Vcc potential and the potential B-Vcc / 2.
At time t2, the capacitor C is fully discharged.
Point B is at 0 volts potential.
The potential of point B continues to increase as the point A is always the potential + Vcc.
The capacitor C charges now through the same diode D2 until time t3.
From time t1 to time t3, only the diode D2 leads, the diode D1 is reverse biased.
This is the same discharge current IL that initially the capacitor C and the load in a second time.
At time t3, the point B is at the potential + Vcc / 2, so the inverter switches and an inverter 2.
A point goes to the potential 0 and the S + Vcc potential.
The potential of the S + increased instantly Vcc, so the potential of point B does the same and passes to + 3 / 2 Vcc.
From time t3 to t5, the same phenomena as those described above are reproduced, but this time, the diode D1 is conducting and the diode D2 is reverse biased.
From t3 to t4, the capacitor C discharges, then t4 to t5, C charges.
When the potential of point B reaches the switching threshold of inverter + Vdc / 2, the two inverters switch.
The S that was going to + Vcc potential 0 volts, a negative edge - Vcc which is transmitted in full to the point B by the capacitor C. This was B + at a potential of Vcc / 2 proceeds to:
We returned to the starting point of our explanation and a new cycle can begin again.
By varying the position of the cursor of the potentiometer P1, the time constants of charging and discharging of C (that relating to the period t3 - t1 and that relating to the period t5 - t3) vary.
Thus, the duty cycle varied.
3. 2. 4. - Astable MADE WITH THE IC 555
This circuit can be used to form an oscillator. Its scheme is shown in Figure 54.
The switch is closed when I was in Q L and Q is open when the level H, and the power.
The operation of the oscillator is represented as a timeline in Figure 55.
At power up, capacitor C charges through the series resistors RA and RB, since the switch I is open (Q is in H).
The truth table of Figure 56 shows you the operation of the RS flip-flop.
When the voltage Vc reaches 2 / 3 Vcc, the R input goes to H level, so the Q output goes to L level. This closes the switch I.
The capacitor C discharges through the resistor RB. The constant discharge is q 1 = R B C. When Vc reaches the threshold 1 / 3 Vcc, input S changes in H and Q returns to H level. The capacitor C is charged with a time constant q 2 = (RA + RB) C and the cycle continues indefinitely.
The period T of the rectangular signal and the duty cycle  are given by the following formulas:
T = 0.7 (2 RA + RB) C
A = (RA + RB) / (RA + RB 2)
It is therefore possible to vary these two parameters by changing the respective values ​​of the three components RA, RB and C.

3. 2. 5. - ASSEMBLY OSCILLATORS USING QUARTZ
Almost all packages previously seen using RC networks.
These arrangements may have insufficient stability for some achievements. Of quartz oscillators are used when high stability is required for installation.
This stability criterion is involved in the clocks measuring the time in which a stable 10-6, or 1 second approximately 13 days, is routinely achieved.
In digital circuits working at their maximum speed, high stability is also necessary to avoid exceeding the operating standards of integrated circuits.
Another example is the communication systems in microprocessors where high stability is required.
a) Quartz crystals
Quartz is silica (Si0 2) crystallized in the hexagonal system.
There are three lines of symmetry in the crystal structure of quartz as shown in Figure 57.
They are:
  • the optical axis ZZ 'through the top.
  • the mechanical axis XX 'passing through the edges.
  • the electrical axis YY 'perpendicular to the faces of the hexagon.
In electronics, the quartz is represented by the symbol of the figure 58-a.
Figure 58-b shows the appearance of the case commonly used for quartz.
Now see their physical properties.
b) The piezoelectric effect.
In electrical oscillators, we use a slice of quartz crystal carved by one of the axes seen before.
When applying an alternating voltage across this strip, it deforms and comes into mechanical vibration.
Note that the amplitude of mechanical vibration is maximum for a certain frequency of the alternating voltage: this is the resonant frequency of the quartz plate, which depends mainly on the axis chosen for the size, dimensions, and the thickness of this strip.
When the quartz crystal is at resonance, it behaves like a tuned circuit that would have the structure as shown in Figure 59.
Here are some typical values ​​of the elements of this circuit.
  • L = 3 H
  • Cs = 0.05 pF
  • R = 2 k W
  • Cm = 10 pF
The ability of Cm is due to editing (hence the name editing capability) of the quartz plate between two metal frames that form a capacitor.
The series circuit L, Cs, R is the equivalent circuit to the crystal itself. Note the low value of the capacitor Cs and cons, the high value of inductance L with respect to those obtained with the coils. It is this last feature which gives the crystal a quality factor Q = (L w) / R high. The Q has a common value of several thousands or even tens of thousands when it rarely exceeds 100 in discrete LC circuits. The quality factor provides crystal oscillator with a very good frequency stability.
We can define two distinct resonant frequencies for this crystal:
the resonant frequency range due to the crystal itself and for which the impedance is minimal because L resonates with Cs.
the parallel resonance frequency due to the parallel circuit of R, L, Cs assembly capacity Cm. For this parallel resonance frequency is called sometimes improperly self resonant frequency, the impedance across the crystal goes up like any parallel LC circuit.
Figure 60 gives the curve of the impedance of a quartz based on the frequency of the signal applied to its terminals.
c) Crystal Oscillators.
One can imagine two types of oscillators depending on whether we use the series resonance or parallel resonance.
However, the series resonant oscillators are more accurate and more stable as they oscillate strictly on the frequency of the crystal itself.
For cons, the oscillators using the parallel resonance depend on the value of the editing capability Cm and other stray capacitance of the assembly. These, made ​​possible in parallel with the quartz, may cause the oscillator frequency.
So first we generally retain for use in the mountains logic or microprocessors.
Figure 61 gives a simple example.
All oscillator consists of an amplifier and a reaction of the output signal in phase with the input signal.
Here, the two inverters in series act as a non-inverting amplifier so that the reaction is carried out by the quartz at its resonance frequency range, behaves like a simple resistance and will therefore bring no phase shift.
The capacitor C and resistors are used to swinging the mount at boot until the quartz resonates.
At the midpoint of the two resistors is removed from the square wave signal output.
This theory therefore ends with this setup using a quartz.
The next theory will focus on number systems and the various codes used in digital electronics.

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